Timekeeping circuits are widely used for various purposes, for example to enforce Digital Rights Management (“DRM”) policies and, in general, to check whether or not a preset time period, which may be associated with various types of time-dependent services, has expired. Some timekeeping circuits continuously require a power source (e.g., a battery) to operate. Other timekeeping circuits utilize charge-retaining devices to estimate elapsed times. A charge-retaining device, such as a capacitor, storing an initial amount of electric charge is permitted to self-discharge, over time, in some generally known manner. The amount of time that has elapsed from the time at which the initial amount of electric charge was stored in the charge-retaining device until a given later time can be found by estimating the amount of electric charge remaining in the device at the given later time.
Conventionally, dedicated charge-storing memory cells have been used to measure elapsed time. “Regular” memory cells, i.e., charge-storing memory cells used to store user data and other types of data, such as instruction codes, authentication information, and the like have not conventionally been used for measuring elapsed times because of their erratic charge-retention behavior. That is, the charge-retention behavior of any individual regular memory cell is erratic because the number of electrons that can usually be stored in a floating gate of a memory cell is small, because of the small size of the cell, which is on the order of nanometers. This means that even a relatively small number of electrons that leak from the floating gate can cause a significant change in the threshold voltage of the memory cell and, therefore, in the binary state (bit value(s)) of the memory cell. Thus, electron leakage from a memory cell can result in loss of the data stored therein (i.e. change in the data value represented by the change in the charge of the memory cell). A “regular” memory cell is also “regular” in the sense that it is fabricated on a common substrate together with other like cells (i.e., the regular cell is not fabricated, or otherwise managed or handled, as a stand-alone cell).
Various factors affect the number of electrons that leak from the floating gate and the rate at which they leak, among which factors temperature is dominant: the higher the temperature of a memory cell, the faster it loses electric charge. However, the temperature effect on electron leakage is reversible. That is, exposing a memory cell to a high temperature (e.g., 45° C.) causes the memory cell to lose electrons at a relatively high rate, but if normal temperatures (e.g., between 20° C. and 25° C.) are resumed, a lower/normal electron leakage rate is resumed as well. Such changes in the electron leakage rate make it difficult to determine to what extent a change in the amount of charge stored in a memory cell is caused by excessive temperature and to what extent the change is merely natural self-discharge due to passage of time.
Another factor inducing discharge of charge-storing memory cells is that the greater the number of write/erase cycles applied to the cells, the more the cells wear or “age”. A worn memory cell can retain an electric charge for a shorter time than can a fresh memory cell or a less worn memory cell. Unlike the case of temperature effects discussed above, wear of a memory cell is irreversible. Therefore, if a memory cell is reused as a timekeeping device (i.e., by reprogramming it with new initial data), the time estimation process has to be adjusted according to the wear or age of the memory cell. However, it cannot be determined whether given charge-storing memory cells have worn “normally”; i.e., as expected (i.e., given normal operating conditions) or faster than expected.
Factors such as the above (temperature and wear), which increase the discharge rate of memory cells beyond their natural self-discharge rate, render it difficult to use the cells' natural self-discharging property to measure time or other discharge-dependent properties.
Some solutions to the problems described above involve using a timekeeping memory cell that is specially designed in a manner to have less erratic behavior than regular memory cells. However, timekeeping memory cells that are specially designed for time calculations have several drawbacks. For example, they are not used for storing regular data: regular data continues to be stored in separate memory cells. Thus, the storage device would require extra dedicated memory cells for the timekeeping task. Another drawback of such dedicated timekeeping memory cells is that they have to be handled separately, and a decision needs to be made as to where in the storage device the specially designed timekeeping memory cells should reside and how to wire them to the other components of the storage device. In other words, using a timekeeping memory cell that is specially designed for time calculations requires modifications in standard procedures related to circuit layout design, testing, and manufacturing.